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  <front>
    <journal-meta>
      <journal-id journal-id-type="publisher-id">80</journal-id>
      <journal-id journal-id-type="index">urn:lsid:arphahub.com:pub:3CDB4662-2EEC-55B0-878A-88F876A7F403</journal-id>
      <journal-title-group>
        <journal-title xml:lang="en">Modern Electronic Materials</journal-title>
        <abbrev-journal-title xml:lang="en">MoEM</abbrev-journal-title>
      </journal-title-group>
      <issn pub-type="ppub">2452-2449</issn>
      <issn pub-type="epub">2452-1779</issn>
      <publisher>
        <publisher-name>Modern Electronic Materials</publisher-name>
      </publisher>
    </journal-meta>
    <article-meta>
      <article-id pub-id-type="doi">10.3897/j.moem.11.4.175359</article-id>
      <article-id pub-id-type="publisher-id">175359</article-id>
      <article-categories>
        <subj-group subj-group-type="heading">
          <subject>Research Article</subject>
        </subj-group>
      </article-categories>
      <title-group>
        <article-title>Rapid thermal annealing in silicon diode and photodiode technologies</article-title>
      </title-group>
      <contrib-group content-type="authors">
        <contrib contrib-type="author" corresp="yes">
          <name name-style="western">
            <surname>Kim</surname>
            <given-names>Aleksandra S.</given-names>
          </name>
          <email xlink:type="simple">a.kim@provektor.ru</email>
          <uri content-type="orcid">https://orcid.org/0009-0007-6299-6498</uri>
          <xref ref-type="aff" rid="A1">1</xref>
          <xref ref-type="aff" rid="A2">2</xref>
        </contrib>
        <contrib contrib-type="author" corresp="no">
          <name name-style="western">
            <surname>Perevedentseva</surname>
            <given-names>Natalya A.</given-names>
          </name>
          <xref ref-type="aff" rid="A3">3</xref>
        </contrib>
        <contrib contrib-type="author" corresp="no">
          <name name-style="western">
            <surname>Yurchuck</surname>
            <given-names>Sergey Yu.</given-names>
          </name>
          <uri content-type="orcid">https://orcid.org/0000-0001-6435-3823</uri>
          <xref ref-type="aff" rid="A2">2</xref>
        </contrib>
        <contrib contrib-type="author" corresp="no">
          <name name-style="western">
            <surname>Korzhov</surname>
            <given-names>Fedor D.</given-names>
          </name>
          <xref ref-type="aff" rid="A2">2</xref>
          <xref ref-type="aff" rid="A3">3</xref>
        </contrib>
      </contrib-group>
      <aff id="A1">
        <label>1</label>
        <addr-line content-type="verbatim">LTD “PRO VEKTOR”, 21 Lokomotivnyi Passage, Moscow 127238, Russian Federation</addr-line>
        <institution>LTD “PRO VEKTOR”</institution>
        <addr-line content-type="city">Moscow</addr-line>
        <country>Russia</country>
      </aff>
      <aff id="A2">
        <label>2</label>
        <addr-line content-type="verbatim">National University of Science and Technology “MISIS”, 4-1 Leninsky Ave., Moscow 119049, Russian Federation</addr-line>
        <institution>National University of Science and Technology “MISIS”</institution>
        <addr-line content-type="city">Moscow</addr-line>
        <country>Russia</country>
      </aff>
      <aff id="A3">
        <label>3</label>
        <addr-line content-type="verbatim">JSC “SPA “Orion”, 9 Kosinskaya Str., Moscow 111538, Russian Federation</addr-line>
        <institution>JSC “SPA “Orion”</institution>
        <addr-line content-type="city">Moscow</addr-line>
        <country>Russia</country>
      </aff>
      <author-notes>
        <fn fn-type="corresp">
          <p>Corresponding author: Aleksandra S. Kim (a.kim@provektor.ru)</p>
        </fn>
      </author-notes>
      <pub-date pub-type="collection">
        <year>2025</year>
      </pub-date>
      <pub-date pub-type="epub">
        <day>01</day>
        <month>12</month>
        <year>2025</year>
      </pub-date>
      <volume>11</volume>
      <issue>4</issue>
      <fpage>209</fpage>
      <lpage>215</lpage>
      <uri content-type="arpha" xlink:href="http://openbiodiv.net/FB60B729-D515-5F56-ADE9-4145FD5070DC">FB60B729-D515-5F56-ADE9-4145FD5070DC</uri>
      <uri content-type="zenodo_dep_id" xlink:href="https://zenodo.org/record/17895968">17895968</uri>
      <history>
        <date date-type="received">
          <day>19</day>
          <month>10</month>
          <year>2025</year>
        </date>
        <date date-type="accepted">
          <day>21</day>
          <month>10</month>
          <year>2025</year>
        </date>
      </history>
      <permissions>
        <copyright-statement>Aleksandra S. Kim, Natalya A. Perevedentseva, Sergey Yu. Yurchuck, Fedor D. Korzhov</copyright-statement>
        <license license-type="creative-commons-attribution" xlink:href="http://creativecommons.org/licenses/by/4.0/" xlink:type="simple">
          <license-p>This is an open access article distributed under the terms of the Creative Commons Attribution License (CC BY 4.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.</license-p>
        </license>
      </permissions>
      <abstract>
        <label>Abstract</label>
        <p>The effect of rapid thermal annealing in H<sub>2</sub> atmosphere on the ohmic properties of contacts on the basis of two-layered transition metals (e.g. Ti, Ni, Pd and Cr) and Au compositions on <italic>р</italic><sup>+</sup>-Si has been studied. It has been shown for the example of two-layered Ti/Au compositions that rapid thermal annealing in H<sub>2</sub> atmosphere at 340 °C for 20 s provides for an ohmic contact with lowest specific resistivity due to the formation of silicides at the Si/Me interface (<italic>Me</italic> = Ti, Ni, Pd and Cr). The applicability of the process in silicon diode technology for reducing the series resistance and increasing the device yield has been confirmed for small contact area commercial <italic>p</italic><sup>+</sup>–<italic>n</italic> clamping diodes. Furthermore, the effect of rapid thermal annealing in H<sub>2</sub> atmosphere on the level of reverse dark currents in highly ohmic <italic>p</italic>-Si photodiode has been studied. The results for the commercial <italic>p</italic>–<italic>i</italic>–<italic>n</italic> silicon multi-pad photocells suggest an improvement of the dark currents of the photosensitive pads and the guard ring after rapid thermal annealing in H<sub>2</sub> atmosphere at 450 °C for 5 s and an increase in the device yield. This can be attributed to the hydrogen saturation of the dangling silicon bonds, providing for a decrease in the density of the surface states and stabilization of the charge properties at the SiO<sub>2</sub>/<italic>p</italic>-Si interface. The applicability of rapid thermal annealing in H<sub>2</sub> atmosphere for dark current reduction in highly ohmic <italic>p</italic>-Si photodiode technology has been confirmed.</p>
      </abstract>
      <kwd-group>
        <label>Keywords</label>
        <kwd>rapid thermal annealing</kwd>
        <kwd>RTA</kwd>
        <kwd>ohmic contact</kwd>
        <kwd>Si/<italic>Me</italic> interface</kwd>
        <kwd>SiO<sub>2</sub>/<italic>p</italic>-Si interface</kwd>
        <kwd>photocell</kwd>
      </kwd-group>
    </article-meta>
  </front>
  <body>
    <sec sec-type="1. Introduction" id="SECID0ERF">
      <title>1. Introduction</title>
      <p>Low contact resistance ρ<italic><sub>s</sub></italic> is a key requirement to the design of ohmic contacts, along with endurance and stability under severe operation conditions. However, an increase in the resistivity at the silicon/metal interface is unavoidable. The latter can be caused by either silicon surface treatment quality before metallization or the structure of the forming metallization layer and the charge properties at the Si/<italic>Me</italic> interface. Furthermore, the surface of silicon always has a natural oxide layer which directly affects the properties of the contact due to mechanical stress. Moreover, the formation of complex metallic phases whose resistivity is often higher than that of the raw components of the metallization increases the overall contact resistance.</p>
      <p>Transition metal silicides, e.g. <italic>Me</italic> = Ti, Ni, Pd and Cr, have a low resistivity and thermal compatibility with silicon [<xref ref-type="bibr" rid="B1">1</xref>, <xref ref-type="bibr" rid="B2">2</xref>], making them promising candidates for the fabrication of ohmic contacts. There is the assumption that rapid thermal annealing (<abbrev xlink:title="rapid thermal annealing" id="ABBRID0EIG">RTA</abbrev>) in an H<sub>2</sub> atmosphere can fundamentally improve the properties of contacts to <italic>p</italic><sup>+</sup>-Si due to the formation of the abovementioned silicides at the Si/<italic>Me</italic> interface. Moreover, this favors the purification of the silicon interface at an atomic level [<xref ref-type="bibr" rid="B3">3</xref>], thus further reducing the contribution to the contact resistance.</p>
      <p>The reverse dark current is an important parameter of photodiode structures. The contribution of the surface component to the dark current of highly ohmic <italic>p</italic>-Si photodiodes comes mainly from the surface states at the interface of silicon oxide SiO<sub>2</sub>, which is used as an insulating film, and from the semiconductor bulk itself. Thermally grown silicon oxide films are known to contain a positive built-in charge [<xref ref-type="bibr" rid="B4">4</xref>, <xref ref-type="bibr" rid="B5">5</xref>]. Partial compensation of that positive charge stabilizes the charge properties at the SiO<sub>2</sub>/<italic>p</italic>-Si interface. This can be achieved via hydrogen saturation of the dangling Si bonds [<xref ref-type="bibr" rid="B6">6</xref>], which reduces the density of the surface states at the SiO<sub>2</sub>/<italic>p</italic>-Si interface. There is the assumption that <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ERH">RTA</abbrev> in an H<sub>2</sub> atmosphere can reduce the level of the reverse dark current of silicon photodiodes with silicon dioxide dielectric films due to a lower contribution of the surface component originating from the stabilization of the charge properties at the SiO<sub>2</sub>/<italic>p</italic>-Si interface.</p>
      <p>Presented below are data on the effect of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E4H">RTA</abbrev> in an H<sub>2</sub> atmosphere on the properties of ohmic contacts for the example of a two-layered Ti/Au composition on <italic>р</italic><sup>+</sup>-Si, as well as its effect on the reverse dark current of a <italic>p</italic>-Si photodiode with a SiO<sub>2</sub> dielectric film. Furthermore, the applicability of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ELAAC">RTA</abbrev> in an H<sub>2</sub> atmosphere for silicon diode and photodiode structure technologies was evaluated.</p>
    </sec>
    <sec sec-type="2. LTLM measurement of specific contact resistance" id="SECID0ERAAC">
      <title>2. LTLM measurement of specific contact resistance</title>
      <p>The fabrication of ohmic contacts requires the capability to measure low specific resistances. There are a number of techniques and their modifications which are used for measuring the specific contact resistance of semiconductor structures. TLM (transmission line method) is one of the most widely used specific contact resistance measurement techniques which takes into account the spreading currents under the contact in the semiconductor bulk, due to the possibility of its adaptation to thin semiconductor films and diffusion layers. Generally, the basics of the technique are as follows. The specific contact resistance ρ<italic><sub>s</sub></italic> is determined via probe measurements of the full contact resistance <italic>R<sub>T</sub></italic> between planar contact pads. The parameter <italic>R<sub>T</sub></italic> includes the contact resistance <italic>R<sub>C</sub></italic> and the semiconductor bulk resistance <italic>R<sub>S</sub></italic> [<xref ref-type="bibr" rid="B7">7</xref>]. Depending on the geometrical shape of the contact pads, the technique in question has two modifications: CTLM (circular transmission line method) and LTLM (linear transmission line method).</p>
      <p>CTLM specific contact resistance measurement is described in detail in earlier works [<xref ref-type="bibr" rid="B8 B9 B10 B11">8–11</xref>]. For example, the CTLM technique was used for studying the ohmic behavior of Ti/<italic>n</italic><sup>+</sup>-ZnO/<italic>n</italic>-Ge and Ti/ITO/<italic>n</italic>-Ge MDS contacts [<xref ref-type="bibr" rid="B10">10</xref>]. Cr/Au, Cr/Au/Ag/Au, Ti/Pt/Au, Pt/Ti/Pt/Au, Pt/Au, Ti/Au, Ti/Pt/Ag and Ti/Pt/Ag/Au contact structures on <italic>p</italic>-GaSb were studied for the fabrication of high photocurrent density photocells (to 15 A/cm<sup>2</sup>) [<xref ref-type="bibr" rid="B11">11</xref>]. The LTLM technique was described elsewhere [<xref ref-type="bibr" rid="B12">12</xref>, <xref ref-type="bibr" rid="B13">13</xref>]. Current propagation mechanisms in Pd/Ni ohmic contacts to <italic>p</italic>-GaN were studied and optimum metallization layer thickness ratio with minimum specific contact resistance were determined [<xref ref-type="bibr" rid="B12">12</xref>]. The contact properties of multilayered Ti (0.02 mm)/Au (0.06 mm)/Pd (0.04 mm)/Au (0.05 mm) metallization on <italic>n</italic>-GaN were studied [<xref ref-type="bibr" rid="B13">13</xref>].</p>
      <p>The LTLM technique with linear semiconductor contacts was used in this work. LTLM measurements were conducted for test structures consisting of multiple similar rectangular contact pads with the length <italic>A</italic> and the width <italic>Z</italic>, having different distances between one another, i.e., <italic>L</italic><sub>12</sub>, <italic>L</italic><sub>13</sub>, <italic>L</italic><sub>23</sub> etc. [<xref ref-type="bibr" rid="B14">14</xref>]. Minimization of the edge current spreading contribution requires the condition <italic>Z</italic> &lt;&lt; <italic>A</italic> be met.</p>
      <p>The specific contact resistance is determined via probe measurements of the resistance between the contact pads and plotting a resistance <italic>vs</italic> contact pad spacing graph (Fig. <xref ref-type="fig" rid="F1">1</xref>), whose tilt angle is <italic>R<sub>S</sub></italic>/<italic>A</italic>, with <italic>L<sub>T</sub></italic> being the transmission length.</p>
      <p>Linear approximation of the measured resistance <italic>vs</italic> contact pad spacing curve allows determining the specific contact resistance using the following equations:</p>
      <p><mml:math id="M1"><mml:msub><mml:mi>R</mml:mi><mml:mi>T</mml:mi></mml:msub><mml:mo>=</mml:mo><mml:mn>2</mml:mn><mml:msub><mml:mi>R</mml:mi><mml:mi>C</mml:mi></mml:msub><mml:mo>+</mml:mo><mml:msub><mml:mi>R</mml:mi><mml:mi>S</mml:mi></mml:msub><mml:mrow><mml:mo>(</mml:mo><mml:mfrac><mml:mi>L</mml:mi><mml:mi>Z</mml:mi></mml:mfrac><mml:mo>)</mml:mo></mml:mrow></mml:math> (1)</p>
      <p><mml:math id="M2"><mml:msub><mml:mi>ρ</mml:mi><mml:mi>C</mml:mi></mml:msub><mml:mo>=</mml:mo><mml:mfrac><mml:mrow><mml:msubsup><mml:mi>R</mml:mi><mml:mi>C</mml:mi><mml:mn>2</mml:mn></mml:msubsup><mml:msup><mml:mi>Z</mml:mi><mml:mn>2</mml:mn></mml:msup></mml:mrow><mml:msub><mml:mi>R</mml:mi><mml:mi>S</mml:mi></mml:msub></mml:mfrac><mml:mo>,</mml:mo></mml:math> (2)</p>
      <p>where <italic>R<sub>C</sub></italic> is the contact resistance; <italic>R<sub>S</sub></italic> is the semiconductor bulk resistance; <italic>L</italic> is the contact pad spacing; <italic>Z</italic> is the contact pad width.</p>
      <fig id="F1" position="float" orientation="portrait">
        <object-id content-type="arpha">80813F1A-85EF-538A-9C9B-E7A528F7871F</object-id>
        <label>Figure 1.</label>
        <caption>
          <p>LTLM measurement of specific contact resistance</p>
        </caption>
        <graphic xlink:href="moem-11-e175359-g001.jpg" position="float" orientation="portrait" xlink:type="simple" id="oo_1489367.jpg">
          <uri content-type="original_file">https://binary.pensoft.net/fig/1489367</uri>
        </graphic>
      </fig>
    </sec>
    <sec sec-type="3. Test structures and experimental technique" id="SECID0EDGAC">
      <title>3. Test structures and experimental technique</title>
      <p>The studies were carried out for 60 mm <italic>n</italic>-Si wafers. The wafers were chemically pretreated in an ammonia-peroxide solution and boron doped by means of 100 keV accelerated ion implantation at a 6.0·10<sup>14</sup> cm<sup>-2</sup> dose for producing a heavily doped <italic>p</italic><sup>+</sup> surface region.</p>
      <p>The LTLM contacts were fabricated by vacuum deposition of a two-layered composition, i.e., gold with an adhesive titanium sublayer, followed by photolithographic stripping of similar rectangular pads with 10 to 550 mm distance from one another (Table <xref ref-type="table" rid="T1">1</xref>). The contact pad sizes were 100×1000 mm<sup>2</sup>.</p>
      <table-wrap id="T1" position="float" orientation="portrait">
        <label>Table 1.</label>
        <caption>
          <p>Distance between contact pads of test structures</p>
        </caption>
        <table id="TID0EQQAE" rules="all">
          <tbody>
            <tr>
              <td rowspan="1" colspan="1">#</td>
              <td rowspan="1" colspan="1">Contact pads</td>
              <td rowspan="1" colspan="1">Distance (mm)</td>
              <td rowspan="1" colspan="1">#</td>
              <td rowspan="1" colspan="1">Contact pads</td>
              <td rowspan="1" colspan="1">Distance (mm)</td>
              <td rowspan="1" colspan="1">#</td>
              <td rowspan="1" colspan="1">Contact pads</td>
              <td rowspan="1" colspan="1">Distance (mm)</td>
            </tr>
            <tr>
              <td rowspan="1" colspan="1">1</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>12</sub>
              </td>
              <td rowspan="1" colspan="1">10</td>
              <td rowspan="1" colspan="1">6</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>23</sub>
              </td>
              <td rowspan="1" colspan="1">20</td>
              <td rowspan="1" colspan="1">11</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>35</sub>
              </td>
              <td rowspan="1" colspan="1">170</td>
            </tr>
            <tr>
              <td rowspan="1" colspan="1">2</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>13</sub>
              </td>
              <td rowspan="1" colspan="1">130</td>
              <td rowspan="1" colspan="1">7</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>24</sub>
              </td>
              <td rowspan="1" colspan="1">150</td>
              <td rowspan="1" colspan="1">12</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>36</sub>
              </td>
              <td rowspan="1" colspan="1">320</td>
            </tr>
            <tr>
              <td rowspan="1" colspan="1">3</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>14</sub>
              </td>
              <td rowspan="1" colspan="1">230</td>
              <td rowspan="1" colspan="1">8</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>25</sub>
              </td>
              <td rowspan="1" colspan="1">290</td>
              <td rowspan="1" colspan="1">13</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>45</sub>
              </td>
              <td rowspan="1" colspan="1">40</td>
            </tr>
            <tr>
              <td rowspan="1" colspan="1">4</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>15</sub>
              </td>
              <td rowspan="1" colspan="1">400</td>
              <td rowspan="1" colspan="1">9</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>26</sub>
              </td>
              <td rowspan="1" colspan="1">440</td>
              <td rowspan="1" colspan="1">14</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>46</sub>
              </td>
              <td rowspan="1" colspan="1">190</td>
            </tr>
            <tr>
              <td rowspan="1" colspan="1">5</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <bold>
                  <italic>
                    <sub>16</sub>
                  </italic>
                </bold>
              </td>
              <td rowspan="1" colspan="1">550</td>
              <td rowspan="1" colspan="1">10</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>34</sub>
              </td>
              <td rowspan="1" colspan="1">30</td>
              <td rowspan="1" colspan="1">15</td>
              <td rowspan="1" colspan="1">
                <italic>L</italic>
                <sub>56</sub>
              </td>
              <td rowspan="1" colspan="1">50</td>
            </tr>
          </tbody>
        </table>
      </table-wrap>
      <p>The thickness of the Au layer was 0.5 mm, and that of the adhesive Ti sublayer, 0.02 mm. The metallization thickness was measured with a Bruker Dektak 3030 contact profilometer.</p>
      <p>Then the test structures were subjected to <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E4GAC">RTA</abbrev> in an H<sub>2</sub> atmosphere. The heat treatment temperature should be far below the melting points of the metals used in the contact: <italic>t</italic><sub>m Au</sub> = 1337 °С and <italic>t</italic><sub>m Ti</sub> = 1668 °С [<xref ref-type="bibr" rid="B14">14</xref>, <xref ref-type="bibr" rid="B15">15</xref>]. Thus, the following <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ERHAC">RTA</abbrev> temperatures were used: 300, 320, 340 and 360 °С. The <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EVHAC">RTA</abbrev> time also differed: 10, 20 and 30 s. The test structures after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EZHAC">RTA</abbrev> at 360 °C for 10 s had initial signs of Au film exfoliation from the Ti sublayer, probably due to the difference in the coefficients of linear thermal expansion α (<abbrev xlink:title="linear thermal expansion α" id="ABBRID0E4HAC">CLTA</abbrev>) of Au and Ti by almost 1.5 times: α<sub>Au</sub> is (13.3–14.5)·10<sup>-6</sup> K<sup>-1</sup>, while α<sub>Ti</sub> is (7.23–8.82)·10<sup>-6</sup> K<sup>-1</sup> [<xref ref-type="bibr" rid="B15 B16 B17">15–17</xref>]. Nevertheless, the above test structures were also studied.</p>
      <p><abbrev xlink:title="rapid thermal annealing" id="ABBRID0ETIAC">RTA</abbrev> was carried out in an RSO-650-200 NPO high-temperature vacuum melting furnace having 18 IR lamps 18 kW each and designed for the 50 to 650 °C range and a high heating rate (above 75 °С/s).</p>
    </sec>
    <sec sec-type="4. Results and discussion" id="SECID0EXIAC">
      <title>4. Results and discussion</title>
      <p>The electrophysical parameters of the test structures were probe-measured with a Hewlett Packard 4277ALCZ meter in the –50 to 50 V range. The test structure measurements were carried out twice: immediately after the formation of the two-layered Ti/Au metallization and after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E4IAC">RTA</abbrev>. Comparison between the typical current-voltage characteristics of the test structures before and after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EBJAC">RTA</abbrev> in an H<sub>2</sub> atmosphere at different temperatures for different time is shown in Fig. <xref ref-type="fig" rid="F2">2</xref>.</p>
      <p>The data (see Fig. <xref ref-type="fig" rid="F2">2</xref>) suggest that immediately after the formation of the two-layered metallization, the current-voltage characteristics of all the test structures were nonlinear, even at low voltages, and <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ERJAC">RTA</abbrev> at 300 and 320 °C did not bring any significant improvement to the contact properties of the test structures. Linear and symmetrical current-voltage characteristics are achieved after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EVJAC">RTA</abbrev> at 340 °C for 10 s or longer. Further increase in the heat treatment temperature to 360 °C provides for linear and symmetric current-voltage characteristics, despite Au film exfoliation from the adhesion Ti sublayer. Typical current-voltage characteristic before and after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EZJAC">RTA</abbrev> in different modes are shown in Fig. <xref ref-type="fig" rid="F2">2</xref>. The optimum H<sub>2</sub> atmosphere <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EDKAC">RTA</abbrev> which is sufficient for the formation of an ohmic Ti/Au contact with <italic>p</italic><sup>+</sup> silicon was chosen to be 340 °C.</p>
      <fig id="F2" position="float" orientation="portrait">
        <object-id content-type="arpha">45B65A06-B5F3-5574-BF05-F27F59E9273A</object-id>
        <label>Figure 2.</label>
        <caption>
          <p>Typical current-voltage characteristics of test structures before and after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EVYAE">RTA</abbrev> in H<sub>2</sub> atmosphere: (<italic>a</italic>, <italic>b</italic>, <italic>e</italic>) 300, 320 and 340 °C for 30 s, (<italic>c</italic>, <italic>f</italic>) 340 and 360 °C for 10 s, and (<italic>d</italic>) 340 °C for 20 s. Solid: after metallization formation; dashed: after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EHZAE">RTA</abbrev></p>
        </caption>
        <graphic xlink:href="moem-11-e175359-g002.jpg" position="float" orientation="portrait" xlink:type="simple" id="oo_1489368.jpg">
          <uri content-type="original_file">https://binary.pensoft.net/fig/1489368</uri>
        </graphic>
      </fig>
      <p>The time of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EMKAC">RTA</abbrev> in an H<sub>2</sub> atmosphere at 340 °C providing for an ohmic contact with the lowest specific contact resistance was found using the LTLM technique. Test structure measurements with the above technique and calculations using Eqs (1) and (2) yielded the following average specific contact resistances:</p>
      <p>– <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EUKAC">RTA</abbrev> for 10 s: 9·10<sup>-3</sup> Ohm·cm<sup>2</sup>;</p>
      <p>– <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E5KAC">RTA</abbrev> for 20 s: 7·10<sup>-3</sup> Ohm·cm<sup>2</sup>;</p>
      <p>– <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EILAC">RTA</abbrev> for 30 s: 7·10<sup>-3</sup> Ohm·cm<sup>2</sup>.</p>
      <p>One can conclude that <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ESLAC">RTA</abbrev> in an H<sub>2</sub> atmosphere is an effective tool for fabricating ohmic contacts between two-layered Ti/Au compositions and <italic>p</italic><sup>+</sup>-silicon. The mechanism of the observed process is as follows. Pulsed thermal annealing triggers the formation of titanium silicides at the Si/Ti interface, thus reducing the specific contact resistance. In this case, Ti can be replaced for other transition metals like Ni, Pd or Cr, since they also tend to form silicides upon interaction with silicon [<xref ref-type="bibr" rid="B1">1</xref>, <xref ref-type="bibr" rid="B2">2</xref>].</p>
      <sec sec-type="4.1. p+–n clamping diodes" id="SECID0EDMAC">
        <title>4.1. <italic>p<sup>+</sup>–n</italic> clamping diodes</title>
        <p>We consider the effect of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EPMAC">RTA</abbrev> on the series resistance of the diode. The series resistance of a <italic>p</italic>–<italic>n</italic> junction is composed of the resistances of the <italic>n</italic> and <italic>p</italic> regions and the contacts to them [<xref ref-type="bibr" rid="B18">18</xref>]. Typically, the resistances of the <italic>n</italic> and <italic>p</italic> regions can be reduced by selecting optimum thicknesses of the regions and impurity concentrations therein. The contact resistances to the <italic>n</italic> and <italic>p</italic> regions depend on the materials used for metallization and the metallization formation technique. Aluminum can be used for the fabrication of ohmic contacts in the silicon device technology. The formation of aluminum contacts includes aluminum deposition to a thickness of about 1 mm, photolithographic stripping of contact pads and contact burning at 470–550 °С [<xref ref-type="bibr" rid="B19">19</xref>]. A disadvantage of aluminum in the ohmic contact technology is its failure to meet a number of environment impact endurance requirements.</p>
        <p>High-endurance device technology requires the use of multilayered contact structures. Chromium, titanium, molybdenum and nickel can be used for adhesive sublayer fabrication. However, titanium is most widely used due to its good adhesion to silicon and SiO<sub>2</sub>, ability to reduce SiO<sub>2</sub> by analogy with aluminum and absence of tendency to form intermetallic compounds [<xref ref-type="bibr" rid="B20">20</xref>]. The conductive layer deposited on the adhesive one should have a low resistivity and provide for good connection of gold outer contact wires. Gold meets all the above conditions.</p>
        <p>The effect of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EXNAC">RTA</abbrev> on the contact resistance of the diodes and the applicability of the technique for silicon diode technology were studied by measuring the parameters of four test batches of <italic>p</italic><sup>+</sup>–<italic>n</italic> clamping diodes with low <italic>p</italic><sup>+</sup> region contact pad areas, i.e., 0.002 mm<sup>2</sup>.</p>
        <p>The raw materials for the above test structures were epitaxial 60 mm (100) <italic>n</italic>/<italic>n</italic><sup>+</sup> silicon wafers, Grade 50KEF150/380KES0.01. The clamping diode technology also included an <italic>n</italic><sup>+</sup> clamping region. Structure cross-section is illustrated in Patent [<xref ref-type="bibr" rid="B21">21</xref>].</p>
        <p>The first and second clamping diode batches were fabricated following a standard route containing the following key process stages:</p>
        <p>– thermal oxidation for passivation film;</p>
        <p>– phosphorus ion implantation predeposition onto wafer face side followed by impurity thermal drive-in diffusion for <italic>n</italic><sup>+</sup> clamping region;</p>
        <p>– phosphorus ion implantation predeposition onto wafer rear side followed by impurity thermal drive-in diffusion for <italic>n</italic><sup>+</sup> rear contact layer;</p>
        <p>– boron predeposition onto wafer face side for <italic>p</italic><sup>+</sup> region;</p>
        <p>– vacuum deposition of two-layered Ti/Au metallic contacts to diode emitter and <italic>n</italic><sup>+</sup> rear contact layer followed by photolithographic stripping.</p>
        <p>The third and fourth clamping diode batches were additionally subjected to <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ELPAC">RTA</abbrev> in an H<sub>2</sub> atmosphere at 340 °C for 20 s, since at longer <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ERPAC">RTA</abbrev> time the contact resistance does not change, as shown above.</p>
        <p>The forward branches of the current-voltage characteristics for the test clamping diodes were probe measured as described above. The measurement voltage range was 0 to 1.2 V. Figure <xref ref-type="fig" rid="F3">3</xref> shows a comparison of 2 typical forward branches of the current-voltage characteristics for test clamping diodes fabricated with and without <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E2PAC">RTA</abbrev>.</p>
        <p>Table <xref ref-type="table" rid="T2">2</xref> shows typical series resistances and device yield of clamping diodes fabricated using conventional technology and modified route.</p>
        <p>The results (Table <xref ref-type="table" rid="T2">2</xref>) suggest that the use of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EMAAE">RTA</abbrev> in an H<sub>2</sub> atmosphere at 340 °C for 20 s for the formation of an ohmic Ti/Au contact to <italic>p</italic><sup>+</sup>-Si reduces the typical range of series resistances <italic>r<sub>s</sub></italic>. The lower limit of the range decreased twofold, and the upper, by 1.86 times as compared to those of the diodes fabricated following the conventional technology. In the meantime, the series resistances range for the <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EZAAE">RTA</abbrev>-treated diodes fully complies with the requirements to the clamping diodes in question, i.e., <italic>r<sub>s</sub></italic> ≤ 0.8 kOhm. Thus, the device yield was increased by 15%. This confirms the applicability of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EBBAE">RTA</abbrev> for series resistance reduction in <italic>p</italic><sup>+</sup>-Si diode technology.</p>
        <p>A Russian Federation Patent was granted for the results [<xref ref-type="bibr" rid="B22">22</xref>].</p>
        <fig id="F3" position="float" orientation="portrait">
          <object-id content-type="arpha">A198B55D-42E5-5EC9-93A6-77A358A3AE6C</object-id>
          <label>Figure 3.</label>
          <caption>
            <p>Typical forward branches of current-voltage characteristic of a <italic>p</italic><sup>+</sup>–<italic>n</italic> clamping diode. Solid curve: clamping diode without rapid thermal annealing (<abbrev xlink:title="rapid thermal annealing" id="ABBRID0E3ZAE">RTA</abbrev>); dashed curve: with <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EA1AE">RTA</abbrev></p>
          </caption>
          <graphic xlink:href="moem-11-e175359-g003.jpg" position="float" orientation="portrait" xlink:type="simple" id="oo_1489369.jpg">
            <uri content-type="original_file">https://binary.pensoft.net/fig/1489369</uri>
          </graphic>
        </fig>
        <table-wrap id="T2" position="float" orientation="portrait">
          <label>Table 2.</label>
          <caption>
            <p>Typical series resistances of <italic>p</italic><sup>+</sup>-<italic>n</italic> clamp diodes</p>
          </caption>
          <table id="TID0EA3AE" rules="all">
            <tbody>
              <tr>
                <td rowspan="2" colspan="1">Parameter</td>
                <td rowspan="1" colspan="2">Diodes</td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">Conventional technology</td>
                <td rowspan="1" colspan="1">
                  <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EJ2AE">RTA</abbrev>
                </td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">Series resistance (kOhm)</td>
                <td rowspan="1" colspan="1">1.2–1.3</td>
                <td rowspan="1" colspan="1">0.6–0.7</td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">Yield (%)</td>
                <td rowspan="1" colspan="1">75</td>
                <td rowspan="1" colspan="1">90</td>
              </tr>
            </tbody>
          </table>
        </table-wrap>
      </sec>
      <sec sec-type="4.2. Multi-pad p–i–n photodiodes" id="SECID0EOBAE">
        <title>4.2. Multi-pad <italic>p</italic>–<italic>i</italic>–<italic>n</italic> photodiodes</title>
        <p>The effect of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E2BAE">RTA</abbrev> on the dark current of silicon photocells with SiO<sub>2</sub> insulating films and the applicability of the technique in photocell technology were studied for two test batches of multi-pad <italic>p</italic>–<italic>i</italic>–<italic>n</italic> photodiodes. The raw materials were 60 mm single-crystal (100) <italic>p</italic>-Si wafers with a specific resistance of 5 kOhm∙cm. The photocell technology included photosensitive pads (<abbrev xlink:title="photosensitive pads" id="ABBRID0EJCAE">PP</abbrev>) distributed in 4 quandants and a planar guard <italic>n</italic><sup>+</sup>–<italic>p</italic> junction. The 4 external and 4 internal pads were located inside 4 and 2 mm diam. concentric circles, respectively. The areas of the external and internal <abbrev xlink:title="photosensitive pads" id="ABBRID0ESCAE">PP</abbrev> were 18 and 0.6 mm<sup>2</sup>, respectively, the gap between the pads being 200 mm [<xref ref-type="bibr" rid="B23">23</xref>]. Thermal SiO<sub>2</sub> was used for photocell periphery passivation, <abbrev xlink:title="photosensitive pads" id="ABBRID0E5CAE">PP</abbrev> isolation and antireflection coating. Structure cross-section was reported earlier [<xref ref-type="bibr" rid="B24">24</xref>].</p>
        <p>The first photocell batch was fabricated following the conventional process route consisting of the following key stages:</p>
        <p>– thermal oxidation for passivation film;</p>
        <p>– phosphorus predeposition and drive-in diffusion for photocell and guard ring regions;</p>
        <p>– phosphorus predeposition onto rear wafer side for gettering layer;</p>
        <p>– getter stripping;</p>
        <p>– boron drive-in diffusion for <italic>p</italic><sup>+</sup> rear contact layer;</p>
        <p>– SiO<sub>2</sub> antireflection film stripping down to semiconductor for contact windows.</p>
        <p>The second photocell batch route additionally included <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EWDAE">RTA</abbrev> in an H<sub>2</sub> atmosphere. The <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E3DAE">RTA</abbrev> temperature should be, on the one hand, below the melting points of the metals used in the contact and, on the other, sufficient for the effective formation of silicon-hydrogen bonds. The chromium melting point is <italic>t</italic><sub>m Cr</sub> = 1877 °С [<xref ref-type="bibr" rid="B15">15</xref>], and that of gold <italic>t</italic><sub>m Au</sub> was shown above. Thus, the following modes were selected:</p>
        <table-wrap id="T3" position="float" orientation="portrait">
          <label>Table 3.</label>
          <table id="TID0EL5AE" rules="all">
            <tbody>
              <tr>
                <td rowspan="1" colspan="1">
                  <bold><abbrev xlink:title="rapid thermal annealing" id="ABBRID0ET3AE">RTA</abbrev> Temperature (°C)</bold>
                </td>
                <td rowspan="1" colspan="1">
                  <bold><abbrev xlink:title="rapid thermal annealing" id="ABBRID0E53AE">RTA</abbrev> Time (s)</bold>
                </td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">340</td>
                <td rowspan="1" colspan="1">20</td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">400</td>
                <td rowspan="1" colspan="1">20</td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">450</td>
                <td rowspan="1" colspan="1">5</td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">470</td>
                <td rowspan="1" colspan="1">5</td>
              </tr>
              <tr>
                <td rowspan="1" colspan="1">500</td>
                <td rowspan="1" colspan="1">5</td>
              </tr>
            </tbody>
          </table>
        </table-wrap>
        <p>The <abbrev xlink:title="photosensitive pads" id="ABBRID0EMEAE">PP</abbrev> and guard ring dark currents of the test photocells were measured using a Karl Suss PM-5 multi-probe measuring system at a 200 V working voltage.</p>
        <p>The photocells after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ESEAE">RTA</abbrev> at 340 and 400 °C did not exhibit any significant dark currents, either in the photocell or in the guard ring, regardless of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EWEAE">RTA</abbrev> time. At a 450–500 °C pulse heat treatment temperature, the dark current became lower. The most efficient reduction of the <abbrev xlink:title="photosensitive pads" id="ABBRID0E1EAE">PP</abbrev> and guard ring dark currents was achieved after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E5EAE">RTA</abbrev> at 450 °C for 5 s.</p>
        <p>Table <xref ref-type="table" rid="T3">3</xref> summarizes typical dark currents of <abbrev xlink:title="photosensitive pads" id="ABBRID0EIFAE">PP</abbrev> and guard rings at the photocell working voltage, for photocells fabricated following the conventional route and the those subjected to additional <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EMFAE">RTA</abbrev> at 450 °C for 5 s, as well as the photocell yield data.</p>
        <p>The data (see Table <xref ref-type="table" rid="T3">3</xref>) suggest that the use of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EWFAE">RTA</abbrev> in an H<sub>2</sub> atmosphere at 450 °C for 5 s reduces the typical range of dark currents. The bottom limit of the dark currents for the external <abbrev xlink:title="photosensitive pads" id="ABBRID0E3FAE">PP</abbrev> decreased by 1.5 times and for the internal <abbrev xlink:title="photosensitive pads" id="ABBRID0EAGAE">PP</abbrev>, by 1.6 times, as compared to the respective parameters for the standard photocell technology. Thus, the device yield was increased by 15%, thus confirming the applicability of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EEGAE">RTA</abbrev> for the technology of highly ohmic <italic>p</italic>-Si photodiodes with SiO<sub>2</sub> insulating film. One can assume that the dark currents become lower due to the hydrogen saturation of the dangling Si bonds, providing for a decrease in the density of the surface states and stabilization of the charge properties at the SiO<sub>2</sub>/<italic>p</italic>-Si interface.</p>
      </sec>
    </sec>
    <sec sec-type="Conclusions" id="SECID0EQGAE">
      <title>Conclusions</title>
      <p>The effect of rapid thermal annealing in an H<sub>2</sub> atmosphere on the ohmic properties of contacts were studied for the example of a two-layered Ti/Au composition on <italic>p</italic><sup>+</sup>-Si. Test structures on <italic>n</italic>-Si with heavily doped <italic>p</italic><sup>+</sup> surface region were fabricated. Similar rectangular contact pads with 10 to 550 mm spacing were fabricated on the test structures for LTLM measurement with a linear semiconductor contact geometry.</p>
      <p>The electrophysical parameters of the test structures were measured over a wide range of voltage (–50 to 50 V) immediately after the formation of metallization and after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0ECHAE">RTA</abbrev> at 300–360 °C with a 20 °C step for determining the temperature at which the current-voltage characteristics of the contacts become linear and symmetrical. The pulse treatment time providing for the lowest specific contact resistance was found via LTLM calculations of the specific contact resistances of the test structures after <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EGHAE">RTA</abbrev> at the selected temperature for 10, 20 and 30 s.</p>
      <p>It was shown that <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EMHAE">RTA</abbrev> in an H<sub>2</sub> atmosphere at 340 °C for 20 s provides for the lowest specific contact resistance of Ti/Au on <italic>p</italic><sup>+</sup>-Si, i.e., 7·10<sup>-3</sup> Ohm·cm<sup>2</sup>. This is due to the formation of low-resistivity titanium silicides at the Si/Ti interface, which improves the contact properties. Ti can be replaced for other transition metals, such as Ni, Pd and Cr, since they also tend to form silicides after interaction with silicon.</p>
      <p>The effect of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0E2HAE">RTA</abbrev> on the series resistance of diodes was studied for the example of <italic>p</italic><sup>+</sup>–<italic>n</italic> clamping diodes. It was shown that pulse treatment in an H<sub>2</sub> atmosphere at 340 °C for 20 s improved the series resistance and, as a result, increased the yield of multi-pad diodes by 15 %. This confirmed the applicability of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EGIAE">RTA</abbrev> for reducing the series resistance in silicon diode technology.﻿</p>
      <p>Furthermore, the effect of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EMIAE">RTA</abbrev> on the reverse dark current was studied for the example of <italic>p</italic>–<italic>i</italic>–<italic>n</italic> photocells based on highly ohmic <italic>p</italic>-Si with SiO<sub>2</sub> insulating film. It was shown that pulsed treatment in an H<sub>2</sub> atmosphere at 450 °C for 5 s improved the dark currents of the <abbrev xlink:title="photosensitive pads" id="ABBRID0E3IAE">PP</abbrev> and the guard ring of the photocells and, as a result, increased the photodiode yield by 15%. This confirms the applicability of <abbrev xlink:title="rapid thermal annealing" id="ABBRID0EAJAE">RTA</abbrev> in an H<sub>2</sub> atmosphere for reducing the dark currents in the technology of highly ohmic <italic>p</italic>-Si photodiodes due to the hydrogen saturation of dangling Si bonds, providing for a decrease in the density of the surface states and stabilization of the charge properties at the SiO<sub>2</sub>/<italic>p</italic>-Si interface.</p>
    </sec>
  </body>
  <back>
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